Subscribed Libraries
Electrical Electrical e-paper
Total: 694
| Sn | Title | Author | Abstract | Full Text |
|---|---|---|---|---|
| 601 | A Low Power Variable Gain Amplifier for Biomedical Application | dipesh panchal, amisha naik, N M Devshrayee | Abstract | Full Text |
| 602 | Nonlinear Semiconductor Device Modeling using Neural Networks | Smrutilekha Samanta | Abstract | Full Text |
| 603 | Comparative Analysis of Low-Power Adiabatic Techniques | charu rana, priyanka ojha | Abstract | Full Text |
| 604 | Design of High-Speed TIQ Comparator for Flash-Type ADC for (WPMOS/LPMOS) > 1 | neerja singh, tania ` gupta | Abstract | Full Text |
| 605 | A Novel Current-Mode Quaternary Multiplier with Indian Vedic Architecture | ashish s shende, deepak r dandekar | Abstract | Full Text |
| 606 | Methodology of Standard Cell Library Design in .LIB Format | Pritam Bhattacharjee | Abstract | Full Text |
| 607 | Design and Analysis of Energy-Efficient GDI Cell and Its Impact on Multipliers | preethi rangaraj, naveen raman | Abstract | Full Text |
| 608 | A Survey on Recent Approaches for Leakage Power Reduction in MOS Integrated Circuits | harshvardhan upadhyay | Abstract | Full Text |
| 609 | A Simple, Compact, and Power-Efficient Current-Mode Decimal Adder Circuit | ashish s shende | Abstract | Full Text |
| 610 | Triangular Waveform Generation using Mixed Signal Modeling | amit krishna dwivedi, A. Islam | Abstract | Full Text |
| 611 | A Cuckoo Search based Approach for Solving Standard Cell Placement Problem | amanpreet singh, maninder kaur | Abstract | Full Text |
| 612 | Low Power 8-Bit Square Root Carry Select Adder Constructed By Using 8 Transistor Full Adder | A unmai | Abstract | Full Text |
| 613 | Design and Implementation of 2nd Order Gm-C IF Tuning Filter Operating at 900 MHz and 88ΓÇô108 MHz Wireless System for Multi Standard Receiver | Kehul A. Shah, N M Devashrayee | Abstract | Full Text |
| 614 | A Novel Design for Power Reduction in Arithmetic Circuits using MTCMOS Technology | Vijayanand K, Sureshkumar N | Abstract | Full Text |
| 615 | Power-delay Product Optimal Design of Sequential Circuits Using Carbon Nanotubes | Mahesh Soni, Vineet Sahula | Abstract | Full Text |
| 616 | Design and Analysis of Source Current Effect on Preamplifier-Positive Feedback-based CMOS Comparator Using 90 nm Technology | Vijay Savani, NM Devashrayee | Abstract | Full Text |
| 617 | Design of Grounded Immittance Simulator using Single CDBA | Sajal K. Paul | Abstract | Full Text |
| 618 | A Novel 4:1 Multiplexer Design using Power Minimization Technique based Domino Logic | Vignesh M, Naveen R | Abstract | Full Text |
| 619 | Logic Optimization Algorithm based on ShannonΓÇÖs Expansion: Reduction in Area, Power and Delay for Pass Gate Implementation | Usha Sandeep Mehta, Vaishali Dhare, Harikrishna Parmar, Rahul A. Shah | Abstract | Full Text |
| 620 | Design of Low Power Folded Cascode Current Mirror CMOS OTA and Implementation of 2nd Order Gm-C IF Filter with Analysis of S-Parameter | Kehul A. Shah, N.M. Devashrayee | Abstract | Full Text |
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