Subscribed Libraries
Electrical Electrical e-paper
Total: 694
| Sn | Title | Author | Abstract | Full Text |
|---|---|---|---|---|
| 681 | High Speed and Low Power Basic Digital Logic Gates, Half-Adder and Full-Adder Using Modified Gate Diffusion Input Technology | Khoirom Johnson Singh, Tripurari Sharan, Huirem Tarunkumar | Abstract | Full Text |
| 682 | Comparative Analysis of Combinational Circuit Using Reversible Logic Based Techniques | Aakriti Dawarand, Bal Krishan | Abstract | Full Text |
| 683 | AXI Bridge and DMA/Bridge Subsystem for PCIe | Shivani Malhotra, Neelam Rup Prakash | Abstract | Full Text |
| 684 | Memristor based Material Implication Logic for Implementation of Basic logic Gates and Circuits | Rita Mahajan, Basudha Dewan, Deepak Bagai | Abstract | Full Text |
| 685 | High Speed Low Offset Power Efficient Fully Differential Double Tail Dynamic Comparator | Priyesh Gandhi, N. M. Devashrayee | Abstract | Full Text |
| 686 | Fault Detection Attainment for Embedded Cores based on Software Test Routines | Vishal Gangadhar Puranik, Dilip Devchand Shah | Abstract | Full Text |
| 687 | Single Bit Low-Power High-Speed Full Adder | Sachin Pandurang Gaikwad, Sujatha Kondakinda, Harsh Upadhyay | Abstract | Full Text |
| 688 | Carbon Nanotube Transistor Based Novel Ring Oscillator with Minimum Power Consumption at 32 nm Technology Node | Chandramohan K, Nikhil Saxena, Sapna Navre, Sonal Soni | Abstract | Full Text |
| 689 | High Speed and Low Area Energy Efficient FPGA Implementation using RSD based Elliptic Curve Cryptography | Abhay Arvind Koparde, K. Sujatha | Abstract | Full Text |
| 690 | Low Power High Speed Eight-Transistor (8T) SRAM Cell with Enhanced Data Stability | P. Raikwal, V. Neema, A. Verma | Abstract | Full Text |
| 691 | Performance Analysis of 3T DRAM Using FinFET Based with Leakage Reduction Techniques at 45 nm Technology | Bharat Tripathi, Saurabh Khandelwal | Abstract | Full Text |
| 692 | Low-Offset High Speed CMOS Voltage Comparator using 180 nm Technology | Rohitkumar M. Joshi, Priyesh P. Gandhi | Abstract | Full Text |
| 693 | Effect of Various Parameters on Threshold Voltage of Virtually Fabricated Lightly Doped PMOS Device | Nitin Sachdeva, Munish Vashishath, P. K. Bansal | Abstract | Full Text |
| 694 | Implementation of RSA and CRT-RSA with MIST to Resist Power Analysis Attacks | Hridoy Joy Mahanta, Ajoy Kumar Khan | Abstract | Full Text |
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