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Total: 694
Sn Title Author Abstract Full Text
561 Design and RTL Implementation for AHB-APB Bridge on SoC shipra sharma, rakhi nangia, neeraj kumar shukla Abstract Full Text
562 Design and Implementation of Low Power 8-bit Level Crossing ADC vaishali gupta, anil kumar gupta Abstract Full Text
563 Comparative Analysis of MOSFET, CNTFET and NWFET for High Performance VLSI Circuit Design: A Review sanjeev kumar sharma, balwinder raj, mamta khosla Abstract Full Text
564 Challenges Beyond 100 nm MOS Devices savita maurya, sarita Shrivastava Abstract Full Text
565 Layout Design, Fabrication and Characterization of n-Channel MOSFET savita maurya, savita Shrivastava Abstract Full Text
566 Design and Performance Trends of Low Power Sigma-Delta A/D Converters saima bashir, suhaib ahmed, vipan kakkar Abstract Full Text
567 A Differentiator Based on Second Generation Current Controlled Conveyor A. Kumar, R. Pandey Abstract Full Text
568 GDI Logic Implementation of Variable Sized CSLA Architectures Using 45 nm SOI Technology jubal saji, shoaib kamal Abstract Full Text
569 Review Paper on Static and Dynamic Power Dissipation of Novel CMOS SRAM Cell Jitendra Krishna Arya, Ashish Raman Abstract Full Text
570 Modeling of Voltage Buffer and Memristor Voltage Buffer Using 180 nm Technology Herman Al Ayubi, navaid Z. rizvi, piyush K. Mishra Abstract Full Text
571 Implementation of Edge Detection Algorithm on FPGA using Hardware Software Co-simulation akash mecwan, bhupendra fataniya, dhaval shah Abstract Full Text
572 Design of Single Bitline Novel 5T SRAM Cell to Reduce The Power Dissipation Using Cadence J. K. Arya, A. Raman Abstract Full Text
573 Cluster Based Sleep Transistor Approach for Low Power 6T SRAM Cell P. Raikwal, V. Neema, A. Verma Abstract Full Text
574 Switched Capacitor-based RC Filter jinal A prajapti, Mehul L Patel Abstract Full Text
575 Simulation Study of Tapered Shape FinFET A. Shrivastava, S. Singh, A. Acharya, G Musalgaonkar Abstract Full Text
576 A Review for Power Optimization in MOS Devices using Different Logic Styles M. Hulkey, H. Upadhyay, K. Sujatha Abstract Full Text
577 Hardware Implementation of Configurable Multi Image Fusion S S. Malwadkar, W M. Mendre, S S. Agrawal Abstract Full Text
578 A Novel Logic Styles used for Leakage Power Reduction in MOS Integrated Circuit M. Hulkey, H. Upadhyay, K. Sujhatha Abstract Full Text
579 Technology Limits on Differential Gain and Unity-gain Bandwidth of a Differential Amplifier: A Theoretical Analysis alpana agarwal, chandra shekhar Abstract Full Text
580 System Level Modeling of ISMB Quadrature Transceiver Narendra Bahadur Singh, rupam goswami, prashant singh Abstract Full Text

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