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Editor Overview
jovdtt maintains an Editorial Board of practicing researchers from around the world, to ensure manuscripts are handled by editors who are experts in the field of study.
Dr. Brajesh Kumar Kaushik
Professor
Indian Institute of Technology, Roorkee, Uttarakhand, India
Editor in Chief
Journal of VLSI Design Tools and Technology
Email :
Institutional Profile Link : http://ece. . .
Publisher
STM Journals, An imprint of Consortium e-Learning Network Pvt. Ltd.
E-mail: [email protected]
Tel: (+91) 0120- 4781 200, (+91)120-4781-215
Mob: (+91) 981-007-8958, (+91)-966-7725-932
- VLSI Design Tools & Technology
Comparative Analysis of CMOS CNFET and Memristor Based Full Adder Circuits and CMOS Memristor Based Multiplexer Circuits
- VLSI Design Tools & Technology
Design of Decoder Using Domino Logic Circuit for VLSI
- VLSI Design Tools & Technology
Design and Simulation of Forging Die Towards Improving Life of Closed Die
About the Journal
Journal of VLSI Design Tools and Technology : (2249-474X) is a peer-reviewed hybrid open-access journal launched in 2015 focused on the rapid publication of View Full Focus and Scope…
Journal Particulars
(+91)120-4781-215 [email protected]
Latest Article
Vol-14 Issue-03 2024
Meet B. Sangani1, Pallavi G. Darji
Keywords: VLSI design flow, Serializer, Open-source tools, RTL-to-GDS flow, 7nm technology
Hetav Desai Desai, Zaid Gugarman, Pallavi Darji, Mitesh Limbachia
Keywords: CMOS, Schmitt Trigger, Power, Hysteresis, Propagation Delay, Noise, Buffer
Sandeep N. Uttarkar, K. B. Ramesh
Keywords: Half Adder (HA), Full Adder (FA), Carry Select Adder (CSA), Carry Look Ahead Adder (CLA), Input Output Blocks (IOB), Configurable logic blocks (CLB), Field Programmable Gate Array (FPGA).
