Journal Menu
Editors Overview
jovdtt maintains an Editorial Board of practicing researchers from around the world, to ensure manuscripts are handled by editors who are experts in the field of study.
Dr. Brajesh Kumar Kaushik
Professor
Indian Institute of Technology, Roorkee
Editor in Chief
Journal of VLSI Design Tools and Technology
Email :
Institutional Profile Link : http://ece. . .
Special Issue
“Electrical Engineering”
Journal of VLSI Design Tools & Technology
Domino Logic Circuit
November 30, 2024
Manuscript Deadline
December 25, 2024
Special Issue
“Electrical Engineering”
Journal of VLSI Design Tools & Technology
FFT Processor
November 30, 2023
Manuscript Deadline
December 25, 2023
Special Issue
“Electrical Engineering”
Journal of VLSI Design Tools & Technology
Round Robin Arbiter
November 30, 2023
Manuscript Deadline
December 25, 2023
Special Issue
“Electrical Engineering”
Journal of VLSI Design Tools & Technology
High-Level Synthesis for VLSI Systems
November 30, 2023
Manuscript Deadline
December 25, 2023
Special Issue
“Electrical Engineering”
Journal of VLSI Design Tools & Technology
November 30, 2023
Manuscript Deadline
December 25, 2023
Special Issue
“Electrical Engineering”
Journal of VLSI Design Tools & Technology
November 30, 2023
Manuscript Deadline
December 25, 2023
Publisher
STM Journals, An imprint of Consortium e-Learning Network Pvt. Ltd. A-118, 1st Floor, Sector-63, Noida, U.P. India, Pin – 201301
E-mail: [email protected]
(Tel) (+91) 0120- 4781 200
(Mob) (+91) 9810078958, +919667725932
- VLSI Design Tools & Technology
Comparative Analysis of CMOS CNFET and Memristor Based Full Adder Circuits and CMOS Memristor Based Multiplexer Circuits
- VLSI Design Tools & Technology
Design of Decoder Using Domino Logic Circuit for VLSI
- VLSI Design Tools & Technology
Design and Simulation of Forging Die Towards Improving Life of Closed Die
About the Journal
Journal of VLSI Design Tools and Technology: 2249-474X(e) is a peer-reviewed hybrid open-access journal launched in 2015 focused on the rapid publication of View Full Focus and Scope…
Journal Particulars
Vol-14 Issue-01 2024
Exploring the Dynamics of Memristors: Mechanisms, Models, and Multifaceted Applications
Dharmendra Ganage, Heramb Bedke, Prasad Rajendra Kulkarni, Shreyangi Edake
Keywords: Memristor, Memristor Emulator, Neuromorphic computing, Nano-Scaling.
Kuldeep Jaiswal, Sunil Kumar Shah
Keywords: FPGA, DDR, DRAM, High-Speed Interfacing, Pipelining, Area Optimization, Verilog HDL, Xilinx EDA, Integrated Software Environment (ISE).
Hardware Synchronization for Embedded Multi-core Processors
Tejasvini Bansode, Anjali Pise
Keywords: PowerPC processor, FPGA, digital signal processing, SNR, RPR, VOS, VLSI systems,
Review on to Design High Speed and Area Three Oprend Binary Adder Using MDCLCG Architecture
Pallavi Prakash Mete, Omprakash Rajankar
Keywords: Three operand adder, carry save adder, Han-Carlson adder, Modular arithmetic,Kogge stone parallel prefix
High-speed Data Converter Architectures: Latched Comparator Design & Performance Comparison
Banoth Krishna, Sandeep Singh Gill, Amod Kumar
Keywords: High speed comparator, Latch comparator, Double tail comparator, High speed ADC
