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International Journal of VLSI Circuit Design & Technology Cover

International Journal of VLSI Circuit Design & Technology

| Peer-Reviewed Journal (Refereed Journal) | Hybrid Open Access

About the Journal

International Journal of VLSI Circuit Design & Technology: is a peer-reviewed hybrid open-access journal launched in 2015 aiming to cover all aspects of VLSI technologies and their integration into recent technologies that are the focus of ongoing research. Journal has a wider scope including all major advancements in the technology and design that are related to VLSI.

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Journal Information

Title: International Journal of VLSI Circuit Design & Technology
Abbreviation: ijvcdt
Issues Per Year: 2 Issues
Publisher: STM Journals
DOI: 10.37591/IJVCDT
Starting Year: 2023
Subject: VLSI Circuit Design
Publication Format: Hybrid Open Access
Language: English
Copyright Policy: CC BY-NC-ND
Type: Peer-reviewed Journal (Refereed Journal)

Address:

STM Journals, An imprint of Consortium e-Learning Network Pvt. Ltd. A-118, 1st Floor, Sector-63, Noida, U.P. India, Pin - 201301

Editorial Board

View Full Editorial Board

ijvcdt maintains an Editorial Board of practicing researchers from around the world, to ensure manuscripts are handled by editors who are experts in the field of study.

Editor in Chief

Editor

Prof. Shyam Akashe, Professor and Dean ICP

ITM University Gwalior, Madhya Pradesh, India, 474001

Email :

Latest Articles

Ahead of Print

How small circuits power big technology in the world of VSIL

Very Small Integration Level (VSIL) circuit technology represents an emerging class of ultra- compact, low-power electronic design methodologies that enable the creation of highly efficient and scalable systems.

VSIL Technology, Miniaturized Circuits, Low-Power Design, Nanoscale Integration, IoT and Embedded Systems

Spintronic Logic Circuits for Ultrafast Processing

Spintronic logic has emerged as one of the most promising post-CMOS paradigms capable of addressing the speed, density, and energy challenges of deeply scaled silicon technologies.

Spintronics, Magnetic Tunnel Junction, Ultrafast Logic, Spin–Orbit Torque, Spin-Transfer Torque, Majority Gate Logic .

Optimized Hardware Realization of AES for High-Throughput FPGA Platforms

The Advanced Encryption Standard (AES) is the predominant symmetric-key cryptographic algorithm used for securing digital communication across embedded systems, IoT devices, cloud infrastructures, and defense networks.

Cryptography, Authentication, AES algorithm, FPGA, reconfigurable platform.

Low-Power Reconfigurable Digital Filter Design Using FPGA for IoT Edge Devices

The rapid evolution of the Internet of Things (IoT) has led to an exponential increase in the deployment of edge devices that continuously process real-time sensor data under strict power, latency, and computational constraints.

Low-power design; FPGA; distributed arithmetic; reconfigurable digital filter; IoT edge devices; partial reconfiguration; signal processing architecture.

Navigating the Antenna Frontier for Emerging IoT Technologies

Internet of Things (IoT) is rapidly transitioning from niche applications to a pervasive, interconnected fabric of intelligent devices, demanding unprecedented levels of performance, reliability, and miniaturization from its constituent components.

IoT, Antenna, multiband, Form factor, Bandwidth

Reconfigurable AES Based AEAD For Multi-Mode Operation with Lightweight Compatibility

The proposal is for a lightweight, multi-mode, reconfigurable authenticated encryption system with associated data (AEADs) based on AES.

AEAD, Lightweight Cryptographic Algorithms, Attacks On Aes Encryption