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Journal of VLSI Design Tools and Technology

2249-474X 2321-6492 Peer‑Reviewed | Subscription‑Based

jovdtt Volume: 15, Issue: 01 Year: 2025

5

Regular Issue  Subscription Original Research Published on :- Jan 09, 2025

RTL to GDSII Implementation UART using Verilog and Cadence tools

By  

 

Dhruv Lalpurwala, Vandan Parekh, Robinson Paul,
Abstract : The paper outlines a thorough design flow for Universal Asynchronous Receiver and Transmitter (UART) utilizing Register Transfer Level (RTL) to read more

[This section belongs to Journal of VLSI Design Tools and Technology (jovdtt)]

 

 

1-7
Regular Issue  Subscription Original Research Published on :- Jan 28, 2025

Design And Implementation of Anti-Interference Low Power Double-Edge Trigger Flip-Flop Based On C-Element

By  

 

Shidesh S., K. B. Ramesh,
Abstract : Double-Edge Triggered Flip-Flops (DETFFs) will use a lot more power when there are glitches and interference in the signal input. This work proposes read more

[This section belongs to Journal of VLSI Design Tools and Technology (jovdtt)]

 

 

36-44
Regular Issue  Subscription Original Research Published on :- Jan 28, 2025

Implementation of STATIC-RANDOM-ACCESS-MEMORY-Based In-Memory Computing-architecture for improving Energy Efficiency

By  

 

Kiran Sharma, Jitendra Ahir, Laxmi Singh,
Abstract : The in-memory-computing architecture the improvement of big data and high-performance computing. In memory-computing (IMC) as reduces the latency and read more

[This section belongs to Journal of VLSI Design Tools and Technology (jovdtt)]

 

 

25-35
Regular Issue  Subscription Review Article Published on :- Jan 28, 2025

Non-Lethal Protection of Farmlands Against Wild Animals and Crop Estimation

By  

 

Anvith Shankar B., Dheeraj Kumar Swamy B., Guru, Abhiram D.,
Abstract : This paper is an integrated smart system that aims to enhance productivity related to agriculture along with agricultural safety through modern read more

[This section belongs to Journal of VLSI Design Tools and Technology (jovdtt)]

 

 

18-24
Regular Issue  Subscription Review Article Published on :- Jan 30, 2025

CMOS-Based Process-Scalable Analog Circuits for Machine Learning: A Comprehensive Review and Future Directions.

By  

 

Abhishek Agwekar, Laxmi Singh,
Abstract : Analog computing techniques are gaining attention for machine learning (ML) applications due to their ability to reduce computational complexity. read more

[This section belongs to Journal of VLSI Design Tools and Technology (jovdtt)]

 

 

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Editorial Board

View Full Editorial Board

jovdtt maintains an Editorial Board of practicing researchers from around the world, to ensure manuscripts are handled by editors who are experts in the field of study.

Editor in Chief

Editor

Dr. Brajesh Kumar Kaushik, Professor

Indian Institute of Technology, Roorkee, Uttarakhand, India,

Email :