Performance and Analysis of 6T, 8T & 10T SRAM Cell in 28nm Technology

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Year : 2026 | Volume : 16 | 02 | Page :
    By

    Anagha Kamdi,

  • Sanket B. Kasturiwala,

  1. Student, Department of M. Tech. VLSI, G H Raisoni College of Engineering and Management, Nagpur,, Maharashtra, India
  2. Associate Professor, Department of Electronics & Telecommunication Engineering, G H Raisoni College of Engineering and Management, Nagpur, Maharashtra, India

Abstract

Technology scaling into deep sub-micron regimes has significantly increased the design challenges of Static Random Access Memory (SRAM), particularly at the 28 nm technology node. As transistor dimensions shrink, SRAM cells become more vulnerable to stability degradation, leakage current, process variations, and reduced noise margins, which adversely affect overall memory performance and reliability. The conventional 6T SRAM cell remains widely used due to its compact structure and high storage density; however, its read and write stability deteriorate considerably with advanced technology scaling. To address these limitations, alternative SRAM architectures such as 8T and 10T cells have been developed. These designs introduce additional transistors to separate read and write operations, thereby improving cell robustness, enhancing noise margins, and reducing read disturbance effects. Nevertheless, these benefits are achieved at the cost of increased silicon area and design complexity. This paper presents a comparative analytical study of 6T, 8T, and 10T SRAM cells implemented at the 28 nm technology node using theoretical analysis and reported literature. Key performance parameters, including stability, leakage power, read and write reliability, variability tolerance, and area overhead, are evaluated and di0scussed. The study highlights the operational characteristics, advantages, limitations, and trade-offs associated with each architecture, providing valuable insights for selecting suitable SRAM designs in modern low-power and high-performance CMOS applications.

Keywords: SRAM, Read/Write Reliability, Leakage Power, 28nm Technology Node, Technology Scaling

How to cite this article:
Anagha Kamdi, Sanket B. Kasturiwala. Performance and Analysis of 6T, 8T & 10T SRAM Cell in 28nm Technology. Journal of VLSI Design Tools and Technology. 2026; 16(02):-.
How to cite this URL:
Anagha Kamdi, Sanket B. Kasturiwala. Performance and Analysis of 6T, 8T & 10T SRAM Cell in 28nm Technology. Journal of VLSI Design Tools and Technology. 2026; 16(02):-. Available from: https://journals.stmjournals.com/jovdtt/article=2026/view=247564


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Ahead of Print Subscription Review Article
Volume 16
02
Received 07/05/2026
Accepted 18/06/2026
Published 25/06/2026
Publication Time 49 Days
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