shalini singh,
Shyam Akashe,
Abstract
Memristive crossbar arrays are one of the fascinating subjects in the field of nanoelectronics and memory devices. The arrangement of arrays consists of grid-like structure with rows and columns of memristors which are resistive devices that can preserve their resistance state even after power is turned OFF. They have now emerged as a promising alternative to traditional memory technologies due to their high density, non-volatility and low power consumption. This paper presents the technique of reading the state of memristor via two different models M-R model and R-M model in Memristor Aided Logic (MAGIC) NOR gate for prime and optimum noise margin. A comparative analysis of both the models are presented in which the M-R model is found to be more beneficial with 5% maximum voltage drop which is a bearable range for any voltage divider. Additionally, the study presents a thorough methodology for determining noise margins in order to assess the dependability and stability of logic circuits. The resilience of memristor-based logic devices in practical applications is determined by this analysis, which guarantees performance under a range of operating situations.
Keywords: Memristor, Magic NOR, Model, Noise Margin, Voltage Divider, Memory
[This article belongs to Recent Trends in Mathematics ]
shalini singh, Shyam Akashe. R-M and M-R Model for Interpreting Logic State of Memristor Aided NOR with Enhanced Noise Margin. Recent Trends in Mathematics. 2024; 01(01):35-41.
shalini singh, Shyam Akashe. R-M and M-R Model for Interpreting Logic State of Memristor Aided NOR with Enhanced Noise Margin. Recent Trends in Mathematics. 2024; 01(01):35-41. Available from: https://journals.stmjournals.com/rtm/article=2024/view=189915
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| Volume | 01 |
| Issue | 01 |
| Received | 02/09/2024 |
| Accepted | 30/09/2024 |
| Published | 17/12/2024 |
| Publication Time | 106 Days |
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