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Tejasvini Bansode, Anjali Pise
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- PG Student, Assistant. Professor Eletronics Engineering, SKN Sinhgad College of Engineering, Korti, Pandharpur, Eletronics Engineering, SKN Sinhgad College of Engineering, Korti, Pandharpur Maharashtra, Maharashtra India, India
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Abstract
nThe focus is not on whether multi-core systems are becoming prevalent, but on how microcontroller architectures should be designed to comply with stringent field requirements. This paper illustrates the transition from single to multiple cores, ensuring coherence and consistency in shared memory through hardware mechanisms. Hardware barriers are implemented to allow for point-to-point synchronization between processor cores. Practical experiments center on the initial stages of transforming single-core systems into dual-core ones by utilizing an FPGA development board that has two PowerPC processor cores. Hardware solutions outperform software when both best- and worst-case situations are evaluated, and synchronization primitives are thoroughly benchmarked. Additionally, the study shows that when many cores use address-sensitive locking on shared memory to take advantage of inherent parallelism, dual-ported memory performs better than single-ported memory. One effective strategy involves using the results from the Booth encoder to correct the inaccuracies caused by the truncated modified Booth multiplier. Cutting off the lowest part of these partial products is a simple approximation technique that reduces latency and hardware overhead; we refer to this design approach as fixed-width multiplier design. A variety of error compensation techniques have been developed recently to improve multipliers with fixed widths’ precision. This approach has shown to decrease errors by almost 50% when compared to a truncated design that lacks error correction
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Keywords: PowerPC processor, FPGA, digital signal processing, SNR, RPR, VOS, VLSI systems,
n[if 424 equals=”Regular Issue”][This article belongs to Journal of VLSI Design Tools and Technology(jovdtt)]
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References
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| Volume | 14 | |
| [if 424 equals=”Regular Issue”]Issue[/if 424][if 424 equals=”Special Issue”]Special Issue[/if 424] [if 424 equals=”Conference”][/if 424] | 01 | |
| Received | April 29, 2024 | |
| Accepted | May 16, 2024 | |
| Published | May 24, 2024 |
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