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Review Article
05-May-2026
64 Bit ALU DESIGN USING VEDIC MATHEMATHICS
By
Sirigineedi Mounisha, Uppalapati Joshna Venkata Srujana, Vemula Rajesh, Velugubanti Lakshman, Yepuganti Manikanta, I.Rama Satya.Nageswara Rao, Saran Kumar,
Abstract: High-speed arithmetic operations are crucial for better performance in contemporary digital systems. Particularly for high bit-width operations, conventional arithmetic logic units (ALUs) frequently experience increased latency and complexity. This …
[This section belongs to International Journal of VLSI Circuit Design & Technology ]