Banoth Krishna
Sandeep Singh Gill
Amod Kumar
- Research Scholar Department of Electrical Engineering, National Institute of Technical Teachers Training and Research, Chandigarh Punjab India
- Professor Department of Electrical Engineering, National Institute of Technical Teachers Training and Research, Chandigarh Punjab India
- Professor and Head Department of Electrical Engineering, National Institute of Technical Teachers Training and Research, Chandigarh Punjab India
Abstract
This paper focuses on the design and optimization of latch comparators for high-speed data converter applications. The performance of different comparator architectures is compared in terms of speed, power consumption, and noise performance. The proposed latch comparator architecture uses a preamplifier to boost gain and sensitivity, and a latch to store the output signal. The latch comparator design is optimized for low power consumption and high speed, and is implemented using 180 nm CMOS technology. The circuits are simulated using cadence virtuoso simulators with a 1.8 V supply DC voltage and a clock frequency of approximately 500 MHz. The responses of the circuits are analyzed and plotted, and the static and dynamic characteristics of different types of comparators are compared, highlighting their advantages and disadvantages. Simulation results show that the proposed latch comparator architecture has better performance compared to other comparator architectures, with lower power consumption and higher speed. The paper also discusses the trade-offs between power consumption, speed, and noise performance, and provides guidelines for selecting the appropriate comparator architecture for high-speed data converter applications.
Keywords: High speed comparator, Latch comparator, Double tail comparator, High speed ADC
[This article belongs to Journal of VLSI Design Tools and Technology(jovdtt)]
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Journal of VLSI Design Tools and Technology
| Volume | 14 |
| Issue | 01 |
| Received | May 16, 2024 |
| Accepted | May 23, 2024 |
| Published | May 30, 2024 |