An Efficient Counter Using Modified Upper and Lower SVL Techniques and TSPCL

Year : 2024 | Volume : 13 | Issue : 02 | Page : 37-43
    By

    subhabrata Datta,

  • Dr. Angshuman Chakraborty,

  1. Research Scholar, Department of ECE, TIT, Tripura, INDIA
  2. Professor, Department of ECE, TIT,, Tripura, INDIA

Abstract

Low power VLSI has emerged as the fundamental building block of the modern
electronic era. This leads to a substantial paradigm shift where both power dissipation,
performance and area of utmost importance. In the earlier time of fabrication, power dissipation
was mainly neglected due to low device density and low operating frequency needed for
computation. But in modern technological era, the need for high device density, higher operating
frequency, proliferation of portable consumer electronics, concerns on environments, device
reliability and cooling cost leads power dissipation issues to be of prime concern. This study
aims to tackle power dissipation by modifying the structures of D-type Flip-Flops (D-FF) and
XOR gates. The objective is to minimize the number of gate counts, which in turn reduces
overall power consumption. We compare our proposed method against existing methodologies,
using the latter as a reference. Our approach shows a notable reduction in transistor count,
leading to lower power consumption and decreased delay. The findings underscore the
effectiveness of our method in improving the efficiency of low power VLSI designs, contributing
significantly to the advancement of modern electronic systems. The proposal exhibits for an
enhanced reduction in transistor count and hence in overall power and delay.

Keywords: VLSI, SVL, TSPCL, Leakage Power, CMOS transistor,

[This article belongs to Research & Reviews : Journal of Physics ]

How to cite this article:
subhabrata Datta, Dr. Angshuman Chakraborty. An Efficient Counter Using Modified Upper and Lower SVL Techniques and TSPCL. Research & Reviews : Journal of Physics. 2025; 13(02):37-43.
How to cite this URL:
subhabrata Datta, Dr. Angshuman Chakraborty. An Efficient Counter Using Modified Upper and Lower SVL Techniques and TSPCL. Research & Reviews : Journal of Physics. 2025; 13(02):37-43. Available from: https://journals.stmjournals.com/rrjophy/article=2025/view=195647



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Regular Issue Subscription Original Research
Volume 13
Issue 02
Received 30/05/2024
Accepted 16/05/2024
Published 18/03/2025


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