Verilog-Based Image Processing on Field Programmable Gate Arrays: Design and Implementation

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Year : 2024 | Volume :11 | Issue : 03 | Page : 13-26
By
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KaziSultanabanu Sayyad Liyakat,

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Kazi Kutubuddin Sayyad Liyakat,

  1. Assistant Professor, Department of General Science and Engineering, Brahmdevdada Mane Institute of Technology, Solapur, Maharashtra, India
  2. Professor and Head, Department of Electronics and Telecommunication Engineering, Brahmdevdada Mane Institute of Technology, Solapur, Maharashtra, India

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Integrated circuits known as Field Programmable Gate Arrays (FPGAs) are frequently offered for sale off the shelf. They are known as “field programmable” because, following manufacture, they enable users to modify the hardware to satisfy particular use case needs. This makes it possible to update features and correct bugs in-place, which is very helpful for remote deployments. Configurable logic blocks (CLBs) and a series of programmable interconnects are features of FPGAs that enable the designer to link and configure blocks to carry out a wide range of tasks, from basic logic gates to intricate operations. It is possible to fit entire SoC designs with several processes into a single FPGA device. The rapid advancement of technology has significantly increased the demand for efficient image processing solutions in various applications, ranging from medical imaging to autonomous vehicles. This study explores the implementation of image processing algorithms using Verilog on Field Programmable Gate Arrays (FPGAs). The primary goal is to leverage the high parallelism and reconfigurability of FPGAs to enhance the performance of image processing tasks, such as filtering, edge detection, and image enhancement. By utilizing Verilog as a hardware description language, we demonstrate how to create optimized image processing modules that can operate at high speeds while consuming minimal power. The results show that FPGA-based implementations markedly outperform traditional software solutions in terms of speed and efficiency, highlighting the feasibility of deploying complex image processing applications in real-time scenarios.

Keywords: Image processing, Verilog, FPGA, Sobel operator, edge detection

[This article belongs to Journal of Semiconductor Devices and Circuits (josdc)]

How to cite this article:
KaziSultanabanu Sayyad Liyakat, Kazi Kutubuddin Sayyad Liyakat. Verilog-Based Image Processing on Field Programmable Gate Arrays: Design and Implementation. Journal of Semiconductor Devices and Circuits. 2024; 11(03):13-26.
How to cite this URL:
KaziSultanabanu Sayyad Liyakat, Kazi Kutubuddin Sayyad Liyakat. Verilog-Based Image Processing on Field Programmable Gate Arrays: Design and Implementation. Journal of Semiconductor Devices and Circuits. 2024; 11(03):13-26. Available from: https://journals.stmjournals.com/josdc/article=2024/view=0

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Regular Issue Subscription Review Article
Volume 11
Issue 03
Received 14/11/2024
Accepted 22/11/2024
Published 02/12/2024
155