Improvements in Analog Performance of Dual Metal Gate based Silicon-on-Insulator Junctionless Transistor with Pocket Doped Window

Open Access

Year : 2021 | Volume : | Issue : 1 | Page : 1-8
By

    Priyansh Tripathi

  1. Narendra Yadava

  2. Mangal Deep Gupta

  3. R.K. Chauhan

  1. M.Tech Student, M.M.M.U.T, Gorakhpur, Uttar Pradesh, India
  2. PhD Scholar, M.M.M.U.T, Gorakhpur, Uttar Pradesh, India
  3. PhD Scholar, M.M.M.U.T, Gorakhpur, Uttar Pradesh, India
  4. Professor, M.M.M.U.T, Gorakhpur, Uttar Pradesh, India

Abstract

This paper elucidates the impact of the pocket doped window on the analog performance of dual metal gate based silicon-on-insulator junctionless transistor (DMG SOIJLT). The analog parameters of the proposed SOIJLT are compared with DMG based conventional SOIJLT. The findings of analog performance comparison reveal that transconductance (gm), transconductance generation factor (TGF), output conductance (gd), output resistance (r0), intrinsic gain (AV), and cut-off frequency (fT) have improved for DMG PD-SOIJLT as compared to DMG SOIJLT. Improvements were also found in OFF-state leakage current (IOFF) and ON-OFF current ratio (ION/IOFF) for DMG PD-SOIJLT. The maximum values of gm, r0, and fT improved by 4.46 times, 3.84 times, and 3.85 times respectively, and AV improved by 21.07 times in ON-state, as compared to DMG SOIJLT. The device simulation and parameter extractions have been carried out using the SILVACO ATLAS-2D device simulator.

Keywords: Analog performance, dual metal gate (DMG), intrinsic gain, junctionless transistor (JLT),pocket doped window, silicon-on-insulator (SOI), output resistance

[This article belongs to Journal of Microelectronics and Solid State Devices(jomsd)]

How to cite this article: Priyansh Tripathi, Narendra Yadava, Mangal Deep Gupta, R.K. Chauhan Improvements in Analog Performance of Dual Metal Gate based Silicon-on-Insulator Junctionless Transistor with Pocket Doped Window jomsd 2021; 8:1-8
How to cite this URL: Priyansh Tripathi, Narendra Yadava, Mangal Deep Gupta, R.K. Chauhan Improvements in Analog Performance of Dual Metal Gate based Silicon-on-Insulator Junctionless Transistor with Pocket Doped Window jomsd 2021 {cited 2021 May 30};8:1-8. Available from: https://journals.stmjournals.com/jomsd/article=2021/view=90783

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Regular Issue Open Access Article
Volume 8
Issue 1
Received May 1, 2021
Accepted May 20, 2021
Published May 30, 2021