Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students

Year : 2024 | Volume : 15 | Issue : 03 | Page : 1 9
    By

    Ajinkya Kshirsagar,

  • Ashit Gajjar,

  • Hetal Shah,

  1. Student, Department of Electronics and Communication Engineering. Dharmsinh Desai University, Nadiad, Gujrat, India
  2. Student, Department of Electronics and Communication Engineering. Dharmsinh Desai University, Nadiad, Gujrat, India
  3. 3Professor,, Department of Electronics and Communication Engineering. Dharmsinh Desai University,, Nadiad, Gujarat, India

Abstract

It is now crucial for students studying electronics and information technology to comprehend computer architecture and logic design. Hands-on, practical instruction is required to assist students in understanding Computer Organization and Architecture (COA). Our kit, which covers essential components including bus interfaces, arithmetic, and logic units (ALU), memory structures, and functional registers, is based on the Von Neumann architecture. Theoretical techniques like block diagrams and top level diagrams are typically used to teach COA, and they frequently ignore the digital design component. Students get a deeper knowledge of how theoretical concepts appear in practical systems by creating a completely functional CPU from scratch. The purpose of this research is to use digital logic gates to construct an 8-bit CPU based on the SAP-1 Architecture. Students will gain a deeper understanding of Computer Architecture and Organization (CAO) with the use of this simulation kit. Students can study digital construction, gain an understanding of CPU operation, and develop the skills necessary to construct customized computers using this kit by working with logic gates. Using digital logic gates in a real hardware simulation, this research presents a model that illustrates the intricate workings of an 8-bit CPU. Students who use this method could construct personalized computers and gain more intuitive knowledge.

Keywords: 8-bit CPU, student learning kit, computer architecture, digital logic design, COA, SAP-1 Architecture

[This article belongs to Journal of Electronic Design Technology ]

How to cite this article:
Ajinkya Kshirsagar, Ashit Gajjar, Hetal Shah. Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students. Journal of Electronic Design Technology. 2024; 15(03):1-9.
How to cite this URL:
Ajinkya Kshirsagar, Ashit Gajjar, Hetal Shah. Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students. Journal of Electronic Design Technology. 2024; 15(03):1-9. Available from: https://journals.stmjournals.com/joedt/article=2024/view=184074


Browse Figures

References

  1. Olukotun K, Hammond L. The future of microprocessors: Chip multiprocessors’ promise of huge performance gains is now a reality. Queue. 2005;3:26–9. DOI: 10.1145/1095408.1095418.
  2. Borkar S, Chien AA. The future of microprocessors. Commun ACM. 2011;54:67–77. DOI: 10.1145/1941487.1941507.
  3. Gray J. Hands-on computer architecture: Teaching processor and integrated systems design with FPGAs. Rt-PA of the 2000 workshop on Computer architecture education 2000 Jun 1. p. 17–es. DOI: 10.1145/1275240.1275262.
  4. Hanafi Ichsan MH, Kurniawan W. CPU implementation using only logisim simulator to achieve computer architecture learning outcome. Bull Electr Eng Inform. 2020;9:747–54. DOI: 10.11591/eei.v9i2.1972.
  5. Gray J. Hands-on computer architecture: Teaching processor and integrated systems design with FPGAs. Rt-PA of the 2000 workshop on Computer architecture education 2000 Jun 1. p. 17–es. DOI: 10.1145/1275240.1275262.
  6. Hernandez Zavala A, Camacho Nieto O, Huerta Ruelas JA, Carvallo Domínguez AR. Design of a general purpose 8-bit RISC processor for computer architecture learning. Comput Sist. 2015;19:371–85. DOI: 10.13053/cys-19-2-1941.
  7. Tocci RJ, Neal S, Moss GL. Widmer Digital Systems: Principles and Applications. 10th ed. Upper Saddle River, NJ: Pearson Education; 1991.
  8. Stallings W. Computer Organization and Architecture. 7th ed. Upper Saddle River, NJ: Prentice Hall; 1994.
  9. Mano M. Computer Architecture. 3rd ed. Mexico City, Mexico: Prentice Hall; 1994.
  10. Jaramillo Gomez G, JA. VHDL: Style Guide and Laboratory Practices for Logic Circuits. Mexico City, Mexico: Editorial Ink; 2011.
Regular Issue Subscription Original Research
Volume 15
Issue 03
Received 03/09/2024
Accepted 18/09/2024
Published 19/11/2024
388

Login


My IP

PlumX Metrics