Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students

Year : 2024 | Volume :15 | Issue : 03 | Page : 1-10
By
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Ajinkya Kshirsagar,

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Ashit Gajjar,

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Hetal Shah,

  1. Student, Department of Electronics and Communication Engineering. Dharmsinh Desai University, Nadiad, Gujrat, India
  2. Student, Department of Electronics and Communication Engineering. Dharmsinh Desai University, Nadiad, Gujrat, India
  3. 3Professor,, Department of Electronics and Communication Engineering. Dharmsinh Desai University,, Nadiad, Gujarat, India

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It is now crucial for students studying electronics and information technology to comprehend computer architecture and logic design. Hands-on, practical instruction is required to assist students to understand Computer Organization and Architecture (COA). Our kit, which covers essential components including bus interfaces, arithmetic and logic units (ALU), memory structures, and functional registers, is based on the Von Neumann architecture. Theoretical techniques like block diagrams and top-level diagrams are typically used to teach COA, and they frequently ignore the digital design component. Students get a deeper knowledge of how theoretical concepts appear in practical systems by creating a completely functional CPU from scratch. The purpose of this research is to use digital logic gates to construct an 8-bit CPU based on the SAP-1 architecture. Students will gain a deeper understanding of Computer Architecture and Organization (CAO) with the use of this simulation kit. Students can study Digital construct, gain an understanding of CPU operation, and develop the skills necessary to construct customized computers using this kit by working with logic gates. Using digital logic gates in a real hardware simulation, this research presents a model that illustrates the intricate workings of an 8-bit CPU. Students who use this method could construct personalized computers and gain more intuitive knowledge.

Keywords: 8-bit CPU, student learning kit, computer architecture, digital logic design, COA, SAP-1 Architecture

[This article belongs to Journal of Electronic Design Technology (joedt)]

How to cite this article:
Ajinkya Kshirsagar, Ashit Gajjar, Hetal Shah. Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students. Journal of Electronic Design Technology. 2024; 15(03):1-10.
How to cite this URL:
Ajinkya Kshirsagar, Ashit Gajjar, Hetal Shah. Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students. Journal of Electronic Design Technology. 2024; 15(03):1-10. Available from: https://journals.stmjournals.com/joedt/article=2024/view=0

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Regular Issue Subscription Original Research
Volume 15
Issue 03
Received 03/09/2024
Accepted 18/09/2024
Published 19/11/2024
220