A Review on Arduino Based Distance Measurement Device
Distance measurement plays a vital role in modern engineering applications such as robotics, defense systems, automotive safety, industrial automation, and assistive technologies.

Journal of VLSI Design Tools and Technology Journal of VLSI Design Tools & Technology [2249-474X(e)] is a peer-reviewed hybrid open-access journal launched in 2015 focused on the rapid publication of fundamental research papers on all areas of VLSI Design Tools & Technology.
Journal of VLSI Design Tools & Technology (JOVDTT): 2249-474X(e) is a peer-reviewed hybrid open-access journal launched in 2015 focused on the rapid publication of
jovdtt maintains an Editorial Board of practicing researchers from around the world, to ensure manuscripts are handled by editors who are experts in the field of study.

Dr. Brajesh Kumar Kaushik, Professor
Indian Institute of Technology, Roorkee, Uttarakhand, India,
Email :
Institutional Profile Link: http://ece.iitr.ac.in/brajesh_kumar_kaushik
Distance measurement plays a vital role in modern engineering applications such as robotics, defense systems, automotive safety, industrial automation, and assistive technologies.
This paper surveys the architectural evolution of Reduced Instruction Set Computer (RISC) architectures from early research prototypes to modern industrial processors, tracing four decades of design refinement across academic, embedded, server, mobile, and open- hardware ecosystems.
Heterogeneous System-on-Chip (SoC) architectures are increasingly adopted in edge computing, artificial intelligence, autonomous systems, and high-performance embedded platforms due to their superior computational efficiency and flexibility.
Technology scaling into deep sub-micron regimes has significantly increased the design challenges of Static Random Access Memory (SRAM), particularly at the 28 nm technology node.
The increasing complexity of next-generation embedded systems has intensified the challenges associated with power dissipation, thermal instability, signal integrity, and interconnect reliability in Very Large- Scale Integration (VLSI) architectures.
This report briefly explains the design process, structure, and evaluation of a CMOS inverter designed using a 45 nm technology process with a focus on its propagation delay and power consumption.
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