An Advanced Traffic Light Controller using Verilog HDL and Implementation on FPGA

Open Access

Year : 2023 | Volume :8 | Issue : 1 | Page : 1-8
By

    Krishna Thakkar

  1. Yash Thakkar

  1. Student, Department of Electronics and Communication Engineering, Institute of Technology, Nirma University, Ahmedabad, Gujarat, India
  2. Student, Department of Electronics and Communication Engineering, Institute of Technology, Nirma University, Ahmedabad, Gujarat, India

Abstract

Traffic control generally is a major challenging problem in basically many metro cities in a definitely major way. The traffic systems need to really be very precise and flexible according to the need in a major way. Microcontrollers and microprocessors can be used to create Traffic Light Control (TLC) systems in general, but their fundamental drawback is that they operate on predetermined schedules determined by programmes, and therefore lack the flexibility to make tiny changes in real time. What if some emergency vehicle generally is there in traffic, then that lane generally has to actually be given the priority but that type of flexibility particularly is not really possible in microcontrollers and microprocessors? There specifically are also some fairly other kind of major advantages of this system which are: (i) the system basically is able to kind of detect emergency vehicles on the really individual road and gives priority to that lane i.e. the pretty Green light of that road lights ON and lights of rest of the other roads turns particularly RED. (ii) Is able to mostly find out the road having pretty green Light for the most part is fairly empty for a actually certain period of time in a really big way. (iii) The system for the most part is able to really find a Traffic Jam on any road and gives priority to that road i.e. the kind of Green light of that road lights ON and lights of rest of the fairly other roads definitely turns RED. As a result, the waiting time is decreased since we are specifically using an FPGA in conjunction with traffic sensors to control traffic in accordance with requirements. Here we essentially have used Altera Cyclone II FPGA Board for observation of results, which specifically is quite significant.

Keywords: FPGA, FSM (Finite state machine), Traffic Light Controller, Verilog HDL, Model Sim, Altera Quartus II, Pin Assignments

[This article belongs to International Journal of Telecommunications Emerging Technologies(ijtet)]

How to cite this article: Krishna Thakkar, Yash Thakkar , An Advanced Traffic Light Controller using Verilog HDL and Implementation on FPGA ijtet 2023; 8:1-8
How to cite this URL: Krishna Thakkar, Yash Thakkar , An Advanced Traffic Light Controller using Verilog HDL and Implementation on FPGA ijtet 2023 {cited 2023 Jan 30};8:1-8. Available from: https://journals.stmjournals.com/ijtet/article=2023/view=90442

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References

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Regular Issue Open Access Article
Volume 8
Issue 1
Received June 18, 2022
Accepted June 30, 2022
Published January 30, 2023