Editor’s Profile

Name: Dr. Maheswari Murali

Editor : Journal of Semiconductor Devices and Circuits

Email:

Affiliation: J.J College of Engineering and Technology, Tamilnadu, India 620009

Professor and Head, Department in electronics & telecommunication engineering at J.J College of Engineering and Technology, Tamilnadu, India
My expertise are VLSI based System Design, System design on reconfigurable device and ASIC, Design of custom Topology for Network-on-Chip, Design of error control codes for Network-on-Chip

Recent Publications

  1. Maheswari M, Seetharaman G. Multi bit random and burst error correction code with crosstalk avoidance for reliable on chip interconnection links. Microprocessors and Microsystems. 2013 Jun 1;37(4-5):420-9.Available at- https://www.sciencedirect.com/science/article/abs/pii/S0141933113000276
  2. Maheswari M, Seetharaman G. Enhanced low complex double error correction coding with crosstalk avoidance for reliable on-chip interconnection link. Journal of Electronic Testing. 2014 Aug;30:387-400.Available at- https://link.springer.com/article/10.1007/s10836-014-5465-5
  3. Maheswari M, Seetharaman G. Hamming product code based multiple bit error correction coding scheme using keyboard scan based decoding for on chip interconnects links. Applied Mechanics and Materials. 2013 Jan 10;241:2457-61.Available at- https://www.scientific.net/AMM.241-244.2457
  4. Maheswari M, Seetharaman G. Design of a novel error correction coding with crosstalk avoidance for reliable on-chip interconnection link. International journal of computer applications in technology. 2014;49(1):80-8.Available at- https://www.inderscienceonline.com/doi/abs/10.1504/IJCAT.2014.059097