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u00a0Abhishek Saha, Vedatrayee Chakraborty,
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nAbstract
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One of the most attractive and promising devices for the nanoscale devices is the double gate MOSFET. The double gate MOSFET can control the Si channel very efficiently and it chooses a very small width of the Si channel. It controls the Si channel by applying gate contact to either side of the channel. The idea of controlling the S channel in such a way reduces the short channel effects and one can get a higher current as compared with a single gate MOSFET. In this paper, models of both symmetric and asymmetric DG-MOSFET are studied and performance is compared with the performance of single gate strained silicon MOSFET. The model of DG-MOSFET is simulated with Silvaco TCAD device simulator and different characteristic parameters are being studied.
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Keywords Asymmetric DG-MOSFET, device modeling, Silvaco TCAD, strained silicon, symmetric DG-MOSFET
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References
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1. G Moore. Cramming more components onto integrated circuits. Electronics. 1965; 38(8): 114.
2. Jean-Pierre Colinge. FinFETs and Other MultiGate Transistors. Springer; 2008.
3. Ieong M, Wong HSP, Nowak E, Kedzierski J, Jones EC. High performance double-gate device technology challenges and opportunities. Proceedings International Symposium on Quality Electronic Design. San Jose, CA, USA. 2002, March 18–21.
4. Wong HS, Chan K, Taur Y. Self-aligned (top and bottom) double-gate MOSFET with a 25nm thick silicon channel. International Electron Devices Meeting. IEDM Technical Digest. Washington, DC, USA. 1997, Dec. 10.
5. Mehdi Zahid Sadi, Nittaranjan Karmakar, Mohammed Khorshed Alam, et al. Comparative analysis of subthreshold swing models for different double gate MOSFETs. 5th International Conference on Electrical and Computer Engineering ICECE. Dhaka, Bangladesh. 2008, Dec. 20–22.
6. Ankita Wagadre, Shashank Mane. Design & performance analysis of DG-MOSFET for reduction of short channel effect over bulk MOSFET at 20nm. Int. Journal of Engineering Research and Applications. 2014; 4(7): 30–34.
7. Sanjay Chopade, M Shashank Mane. Design of DG-CNFET for reduction of short channel effect over DG MOSFET at 20 nm. 2013 IEEE International Conference of IEEE Region 10 (TENCON 2013). Xi’an, China. 2013, Oct. 22–25.
8. Santosh Kumar Gupta et al. Simulation and analysis of gate engineered triple metal double gate (TM-DG) MOSFET for diminished short channel effects. IJAST. 2012; 38: 15–24.
9. Valco George. Getting started with the Silvaco TCAD software for EE637 and EE734. 2010. [Online] Available at: https://web.archive.org/web/20080828110857/http://www.ece.osu.edu/~ valco/silvaco/index.html.
10. Silvaco. (2019). Silvaco [online] Available at: https://silvaco.com/examples/tcad/section26/example3/index.html.
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Journal Menu
Editors Overview
josdc maintains an Editorial Board of practicing researchers from around the world, to ensure manuscripts are handled by editors who are experts in the field of study.
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- By [foreach 286]n
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Abhishek Saha, Vedatrayee Chakraborty
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- Assistant Professor, Assistant Professor,Dream Institute of Technology, B.P. Poddar Institute of Management and Technology,Kolkata, West Bengal, Kolkata, West Bengal,India, India
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Abstract
nOne of the most attractive and promising devices for the nanoscale devices is the double gate MOSFET. The double gate MOSFET can control the Si channel very efficiently and it chooses a very small width of the Si channel. It controls the Si channel by applying gate contact to either side of the channel. The idea of controlling the S channel in such a way reduces the short channel effects and one can get a higher current as compared with a single gate MOSFET. In this paper, models of both symmetric and asymmetric DG-MOSFET are studied and performance is compared with the performance of single gate strained silicon MOSFET. The model of DG-MOSFET is simulated with Silvaco TCAD device simulator and different characteristic parameters are being studied.n
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Keywords: Asymmetric DG-MOSFET, device modeling, Silvaco TCAD, strained silicon, symmetric DG-MOSFET
n[if 424 equals=”Regular Issue”][This article belongs to Journal of Semiconductor Devices and Circuits(josdc)]
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Full Text
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Browse Figures
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References
n[if 1104 equals=””]
1. G Moore. Cramming more components onto integrated circuits. Electronics. 1965; 38(8): 114.
2. Jean-Pierre Colinge. FinFETs and Other MultiGate Transistors. Springer; 2008.
3. Ieong M, Wong HSP, Nowak E, Kedzierski J, Jones EC. High performance double-gate device technology challenges and opportunities. Proceedings International Symposium on Quality Electronic Design. San Jose, CA, USA. 2002, March 18–21.
4. Wong HS, Chan K, Taur Y. Self-aligned (top and bottom) double-gate MOSFET with a 25nm thick silicon channel. International Electron Devices Meeting. IEDM Technical Digest. Washington, DC, USA. 1997, Dec. 10.
5. Mehdi Zahid Sadi, Nittaranjan Karmakar, Mohammed Khorshed Alam, et al. Comparative analysis of subthreshold swing models for different double gate MOSFETs. 5th International Conference on Electrical and Computer Engineering ICECE. Dhaka, Bangladesh. 2008, Dec. 20–22.
6. Ankita Wagadre, Shashank Mane. Design & performance analysis of DG-MOSFET for reduction of short channel effect over bulk MOSFET at 20nm. Int. Journal of Engineering Research and Applications. 2014; 4(7): 30–34.
7. Sanjay Chopade, M Shashank Mane. Design of DG-CNFET for reduction of short channel effect over DG MOSFET at 20 nm. 2013 IEEE International Conference of IEEE Region 10 (TENCON 2013). Xi’an, China. 2013, Oct. 22–25.
8. Santosh Kumar Gupta et al. Simulation and analysis of gate engineered triple metal double gate (TM-DG) MOSFET for diminished short channel effects. IJAST. 2012; 38: 15–24.
9. Valco George. Getting started with the Silvaco TCAD software for EE637 and EE734. 2010. [Online] Available at: https://web.archive.org/web/20080828110857/http://www.ece.osu.edu/~ valco/silvaco/index.html.
10. Silvaco. (2019). Silvaco [online] Available at: https://silvaco.com/examples/tcad/section26/example3/index.html.
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Journal of Semiconductor Devices and Circuits
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Volume | 8 |
Issue | 1 |
Received | April 19, 2021 |
Accepted | May 10, 2021 |
Published | May 25, 2021 |
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