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nThis paper present high frequency design approach and feasibility study of HBT (Hetero Junction Bipolar Transistor) based two-stage cascode amplifiers at W-band (90.0 GHz-100.0 GHz). The proposed amplifier has design using 130 nm SiGe based BiCMOS technology. This paper used low cost technology for designing of w-band amplifier and this is novelty of this paper. The schematic design and feasibility study has been carried out using Cadence software. The selection of active device, input and output matching and impacts of passive components have been analyzed for designing of amplifier at W-band frequency range. The schematic designed two-stage amplifier achieved +18.794±2.0 dB of small signal gain, better than – 15 dB of input return loss and better than-8.0dB of output return loss in simulation. This amplifier achieved +5.93 dBm of linear output power (+1 dB compression output power (P1 dB)) and +8.14 dBm of saturated output power in simulation at 95 GHz. This amplifier achieved less than +7% of %THD (Total Harmonic distortion). This schematic design amplifier includes the effect of all pads and bond wires of both stages of amplifier. The total current consumption of two-stage amplifier has only 30.0 mA with supply voltage of 3.3 volt.n

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1. Ekaterina Laskin, Pascal Chevalier, Member, Alain Chantre, Bernard Sautreuil, and Sorin P. Voinigescu. 165-GHz Transceiver in SiGe Technology. IEEE Journal of Solid-State Circuits, Vol. 43, No. 5, May 2008
2. Sung-Woon Moon, Yong-Hyun Baek, Jung-Hun Oh, Min Han, Jin Koo Rhee, Sam Dong Kim. New small-signal modelling method for W-band MHEMT-based Amplifier design. Proceedings of the 40th European Microwave Conference, pp 1146-1149
3. Bok-Hyung Lee, Dan An, Mun-Kyo Lee, Byeong-Ok Lim, Sam-Dong Kim, and Jin-Koo Rhee “Two Stage Broadband High-Gain W-Band Amplifier Using 0.1-um Metamorphic HEMT Technology. IEEE Electron Device Letters, Vol. 25, No. 12, December 2004
4. Yu-Sian Jiang, Jeng-Han Tsai, and Huei Wang. A W-Band Medium Power Amplifier in 90 nm CMOS. IEEE Microwave and Wireless Components Letters, vol. 18, No. 12, December 2008.
5. T. Suzuki, Y. Kawano, M. Sato, T. Hirose, and K. Joshin. 60 and 77GHz power amplifier in standard 90 nm CMOS. IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2008, pp. 562–636.
6. B. Heydari, M. Bohsali, E. Adabi, and A. M. Niknejad. Low-power mm-wave components up to 104 GHz in 90 nm CMOS. IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2007, pp.200–201.
7. E. Laskin, M. Khan pour, R. Aroca, K. W. Tang, P. Garcia, S.P. Voinigescu. 95 GHz receiver with fundamental frequency VCO and static frequency divider in 65 nm digital CMOS. in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2008, pp.180–181.
8. S.T. Nicolson, A. Tomkins, K.W. Tang, A. Cathelin, D. Belot, S.P. Voinigescu. A 1.2 V, 140 GHz receiver with on-die antenna in 65 nm CMOS. Proc. IEEE Rad. Freq. Integrated Circuits Symp., Jun.2008, pp. 239–242.
9. Y.-S. Jiang, Z.-M. Tsai, J.-H. Tsai, H.-T. Chen, H. Wang. A 86 to108 GHz amplifier in 90 nm CMOS. IEEE Microw. Wireless Compon. Lett., vol. 18, no. 2, pp. 124–126, Feb. 2008.
10. D. Nayak, L.-T. Hwang, I. Turlik. Simulation and design of lossy transmission lines in a thin-film multichip package. IEEE Trans. Compon., Packag., Manufact. Technol. A, vol. 13, no. 2, pp. 294– 302, Jun. 1990.

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[if 344 not_equal=””]ISSN: 2455-0329[/if 344]

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Abstract

nDue to its successful operation in the 2.4 GHz frequency region, often known as the ISM (Industrial, Scientific, and Medical) band, RFICs play a vital role in communication systems. The major parts being used transceivers for frequency translation and amplification are LNA and Mixers. Different types of mixers and LNAs are employed, and different strategies are used to optimize them. In this paper an approach for design and simulation of cascode LNA is discussed to increase to efficiency and Radio Frequency (RF) performance of LNA. More emphasis is put here on the optimization of design. The LNA parameters show how the amplifier is going to work for the proposed design. A low noise amplifier simulated in 90 nm CMOS technology. The proposed cascode LNA consists of two transistors. It exhibits 2.5-dB noise figure and 23-dB gain at 2.4 GHz while consuming only 44 nW, this results are confirmed after post layout simulations. These straightforward and analytical conclusions are particularly important since they may be used not only to build CMOS LNA circuits, and to characterise and diagnose them, whether functional prototypes or built. The Communication System’s core building block or key component is a Low Noise Amplifier. Any radio receiver is made up of a Low Noise Amplifier, a mixer, and a Filter (Power Efficient Active Filter), with the LNA playing a critical part in the circuit as an amplifier.n

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1. G. Bhushan Rao, “A high gain and high linear LNA for low power receiver front-end applications,” International Conference on Communication and Signal Processing (ICCSP), 2016.
2. Malti Bansal; Jyoti, “Cascode Inductive Source Degenerated CMOS LNA with Parallel RLC Output Matching Network for IEEE 802.11 Standard in 45 nm Technology,” Fourth International Conference on Inventive Systems and Control (ICISC), 2020.
3. Santosh B. Patil; Rajendra D. Kanphade, “Differential Input Differential Output Low Power High Gain LNA for 2.4 GHz Applications Using TSMC 180 nm CMOS RF Process,” International Conference on Computing Communication Control and Automation,2015
4. T. Johansson, “LNA Simulation using Cadence SpectreRF,” RF IC Design 2018, LinkopingUniversity
5. Li, Z., Wang, Z., Zhang, M., et al.: ‘A 2.4 GHz ultra-low-power current-reuse CG-LNA with active gm-boosting technique’, IEEE Microw. Wirel. Compon. Lett., 2014, 24, (5), pp. 348–350
6. Meaamar, A., Boon, C.C., Yeo, K.S., et al.: ‘A wideband low power lownoise amplifier in CMOS technology’, IEEE Trans. Circuits Syst. I, Regul. Pap., 2010, 57, (4), pp. 773–782
7. Kim, Tae-Wook; Lee, Kwyro., et al.: ‘A Simple and Analytical Design Approach for Input Power Matched On-chip CMOS LNA’, JSTS: Journal of Semiconductor Technology and Science
8. Bevilacqua, A., Niknejad, A.M.: ‘An ultra-wide band CMOS low-noise amplifier 3.1–10.6-GHz wireless receivers’, IEEE J. Solid-State Circuit, 2004, 39, (12), pp. 2258–2268
9. Chen, K.H., Lu, J.H., Chen, B.J., et al.: ‘An ultra-wide band 0.4–10 GHz LNA in 0.18 μm CMOS’, IEEE Trans. Circuits Syst. II, Express Briefs, 2007, 54, (3), pp. 217–221
10. Weng, R.M., Liu, C.Y., Lin, P.C.: ‘A low-power full-band low-noise amplifier for ultra-wideband receivers’, IEEE Trans. Microw. Theory Tech., 2010, 58, (8), pp. 2077–2083
11. A. Van der Ziel, Noise in Solid State Devices and Circuits. New York: Wiley, 1986

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