International Journal of VLSI Circuit Design & Technology

International Journal of VLSI Circuit Design & Technology International Journal of VLSI Circuit Design & Technology: is an online open-access journal launched in 2023 aiming to cover all aspects of VLSI technologies and their integration into recent technologies that are the focus of ongoing research. Journal has a wider scope including all major advancements in the technology and design that are related to VLSI.

• Digital VLSI Design: Combinational and sequential circuits, arithmetic circuits, finite-state machines, datapath architectures, logic optimization, timing design, and high-speed digital systems.
• Analog VLSI Design: Analog integrated circuits, amplifiers, oscillators, filters, voltage references, current mirrors, signal-conditioning circuits, and analog building blocks.
• Mixed-Signal VLSI: ADCs, DACs, PLLs, clock-generation circuits, mixed-signal interfaces, data converters, sensor interfaces, and mixed-signal verification.
• CMOS Circuit Design: CMOS logic, transistor-level circuit design, static and dynamic CMOS, low-voltage design, leakage reduction, short-channel effects, and nanoscale CMOS technologies.
• Low-Power VLSI: Clock gating, power gating, voltage scaling, leakage control, energy-efficient architectures, power-aware design, low-power memory, and ultra-low-power integrated circuits.
• High-Speed and High-Performance VLSI: Pipeline architectures, parallel processing, timing optimization, high-frequency circuits, high-throughput hardware, latency reduction, and performance-oriented circuit design.
• FPGA and Reconfigurable Computing: FPGA architectures, reconfigurable logic, hardware acceleration, FPGA prototyping, partial reconfiguration, programmable logic systems, and high-performance FPGA implementations.
• ASIC Design: Application-specific integrated circuits, custom digital architectures, ASIC design flow, logic synthesis, physical implementation, and domain-specific hardware.
• Hardware Description Languages: Verilog, VHDL, SystemVerilog, RTL modelling, behavioral modelling, synthesizable design, and hardware abstraction.
• RTL Design and Optimization: Register-transfer-level design, logic minimization, datapath optimization, control-path design, resource sharing, and synthesis-aware RTL coding.
• Electronic Design Automation: Logic synthesis, placement and routing, floorplanning, static timing analysis, power analysis, design-rule checking, layout-versus-schematic verification, and automated design optimization.
• Physical Design: Floorplanning, placement, routing, clock-tree synthesis, congestion reduction, parasitic extraction, signal integrity, timing closure, and power-grid design.
• VLSI Testing and Design for Testability: Scan design, automatic test-pattern generation, built-in self-test, fault modelling, fault simulation, test compression, memory testing, and DFT-compatible architectures.
• Fault-Tolerant VLSI: Error detection and correction, timing-error tolerance, redundancy, resilient circuit architectures, radiation tolerance, soft-error mitigation, and reliable VLSI systems.
• Formal and Functional Verification: Simulation, equivalence checking, assertion-based verification, formal verification, coverage analysis, verification environments, and hardware validation.
• System-on-Chip Design: SoC architecture, IP integration, bus systems, embedded processors, hardware accelerators, heterogeneous SoCs, and system-level integration.
• Multiprocessor System-on-Chip: MPSoC architectures, multicore processing, interprocessor communication, shared-memory systems, task mapping, and hardware-software co-design.
• Network-on-Chip: NoC architectures, routing, switching, topology design, congestion management, fault tolerance, quality of service, and scalable on-chip communication.
• Embedded VLSI Systems: Embedded processors, hardware-software integration, real-time hardware, embedded accelerators, sensor nodes, and application-specific VLSI platforms.
• Digital Signal Processing Hardware: FIR and IIR filters, FFT architectures, image-processing hardware, audio-processing systems, communication signal processing, and DSP accelerators. Recent IJVCDT work on underwater wireless sensor-node digital filters fits this area well.
• Cryptographic Hardware: AES, RSA, ECC, hash architectures, cryptographic accelerators, secure hardware, FPGA-based encryption, and high-throughput security implementations. Recent IJVCDT work includes optimized FPGA-based AES hardware.
• Hardware Security: Hardware Trojans, physically unclonable functions, side-channel resistance, secure boot, trusted hardware, secure IC design, and tamper-resistant circuits.
• Memory Design: SRAM, DRAM, cache memories, register files, low-power memories, nonvolatile memories, memory controllers, and emerging memory architectures.
• AI and Machine-Learning Hardware: Neural processing units, AI accelerators, edge-AI hardware, CNN accelerators, hardware-efficient neural networks, and machine-learning-specific architectures.
• Neuromorphic Computing: Spiking neural networks, brain-inspired circuits, event-driven processing, neuromorphic architectures, and low-power intelligent hardware.
• Spintronic and Post-CMOS Logic: Magnetic tunnel junctions, spin-transfer torque, spin-orbit torque, nonvolatile logic, spintronic circuits, and beyond-CMOS computing. This is already represented in recent IJVCDT publications.
• Semiconductor Devices for VLSI: FinFETs, gate-all-around transistors, nanoscale MOSFETs, silicon-on-insulator devices, emerging transistor technologies, and device-circuit interaction.
• Three-Dimensional ICs and Chiplets: 2.5D/3D integration, through-silicon vias, die stacking, chiplets, heterogeneous integration, advanced packaging, and thermal management.
• VLSI for IoT and Sensor Nodes: Ultra-low-power hardware, embedded sensors, wireless sensor nodes, wearable electronics, IoT edge devices, and application-specific low-power circuits.
• Communication VLSI: Baseband processors, wireless communication hardware, channel coding, modulation hardware, MIMO architectures, RF-digital interfaces, and communication accelerators.
• Image and Video Processing Hardware: Image filters, object detection hardware, video codecs, vision accelerators, image enhancement circuits, and real-time imaging architectures.
• Biomedical VLSI: Implantable electronics, biosignal acquisition, wearable hardware, medical sensor interfaces, low-power biomedical circuits, and health-monitoring systems.
• Reliability and Process Variation: Process-voltage-temperature variation, aging, electromigration, timing variation, yield analysis, thermal effects, and reliability-aware design.
• Emerging VLSI Technologies: Quantum-inspired hardware, photonic computing, memristor-based logic, in-memory computing, flexible integrated circuits, neuromorphic devices, and next-generation semiconductor architectures.