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International Journal of VLSI Circuit Design & Technology

ijvcdt | Peer-Reviewed | Online

About the Journal

International Journal of VLSI Circuit Design & Technology International Journal of VLSI Circuit Design & Technology: is an online open-access journal launched in 2023 aiming to cover all aspects of VLSI technologies and their integration into recent technologies that are the focus of ongoing research. Journal has a wider scope including all major advancements in the technology and design that are related to VLSI.

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International Journal of VLSI Circuit Design & Technology (IJVCDT) is a peer-reviewed hybrid open-access journal launched in 2023 that broadly covers the current, View Full Focus and Scope…

Journal Information

Title:
International Journal of VLSI Circuit Design & Technology
Abbreviation:
IJVCDT
Issues Per Year:
2 Issues (Jan-June),(July-Dec)
Publisher:
116314
DOI:
10.37591/IJVCDT
Starting Year:
2023
Subject:
Language:
English
Publication Format:
Hybrid Open Access
Copyright Policy:
CC BY-NC-ND
Type:
Peer-reviewed Journal (Refereed Journal)
Address:

Editorial Board

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ijvcdt maintains an Editorial Board of practicing researchers from around the world, to ensure manuscripts are handled by editors who are experts in the field of study.

Editor in Chief

Editor

Prof. Shyam Akashe, Professor and Dean ICP

ITM University Gwalior, Madhya Pradesh, India, 474001

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Latest Articles

An Overview on VLSI based Hardware Security in IoT Node

In the coming era, security will not be a feature we add to an IoT device; it will be a property inherent to its transistor-level design.

VLSI, IoT, Security, Hardware Security, IoT Node security

A Comprehensive Review of CMOS Analog Circuit Design Techniques for Low-Power VLSI Systems

CMOS analog circuit design plays a significant role in the development of modern low-power Very Large-Scale Integration (VLSI) systems used in wireless communication, biomedical devices, portable electronics, embedded systems, and Internet of Things (IoT) applications.

CMOS Analog Circuits, Low-Power VLSI, Operational Transconductance Amplifier (OTA), Mixed-Signal Integrated Circuits, Electronic Design Automation (EDA)

Machine Learning Assisted Timing Violation Prediction in Sub-7nm VLSI Physical Design

The continuous scaling of semiconductor technology into the sub-7nm regime has introduced significant challenges in timing closure due to process variability, interconnect delay, power density, and manufacturing uncertainties.

Sub-7nm VLSI Design, Timing Violation Prediction, Machine Learning, Physical Design Automation, Static Timing Analysis, Deep Neural Networks.

Spintronic Logic Device Modeling and Energy Optimization for Beyond-CMOS Computing Systems

The continuous scaling limitations of conventional CMOS technology have accelerated the exploration of alternative computing paradigms for next-generation low-power and high-performance systems.

Spintronic Logic Devices; Beyond-CMOS Computing; Energy Optimization; Spin-Transfer Torque; Nanoelectronics; Low-Power Computing.

64 Bit ALU DESIGN USING VEDIC MATHEMATHICS

High-speed arithmetic operations are crucial for better performance in contemporary digital systems. Particularly for high bit-width operations, conventional arithmetic logic units (ALUs) frequently experience increased latency and complexity.

ALU, Vedic Mathematics, Urdhva Tiryagbhyam, Kogge-Stone Adder, Verilog, VLSI

How small circuits power big technology in the world of VSIL

Very Small Integration Level (VSIL) circuit technology represents an emerging class of ultra- compact, low-power electronic design methodologies that enable the creation of highly efficient and scalable systems.

VSIL Technology, Miniaturized Circuits, Low-Power Design, Nanoscale Integration, IoT and Embedded Systems

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