Dharmendra Ganage,
Sai Hajare,
Samta Sao,
Sakshi Khatal,
Suchita Wagh,
- Assistant Professor, Sinhgad College of Engineering, Pune, Maharashtra, India
- Student, Sinhgad College of Engineering, Pune, Maharashtra, India
- Student, Sinhgad College of Engineering, Pune, Maharashtra, India
- Student, Sinhgad College of Engineering, Pune, Maharashtra, India
- Assistant Professor, Sinhgad College of Engineering, Pune, Maharashtra, India
Abstract
An extensive review of NAND flash memory technology is given in this study, with an emphasis on its design, guiding principles, and most recent developments. The importance of NAND flash memory in contemporary digital storage systems is discussed in general terms, emphasizing how widely used it is in everything from consumer electronics to business storage solutions. The underlying architecture of NAND flash memory, including the arrangement of memory cells, pages, blocks, and planes, is then explored, along with its basic concepts. The workings of NAND flash memory are further explained, covering important issues like longevity constraints and program disturbance in addition to ideas like programming, erasing, and reading operations. This paper examines the recent historical trends in NAND Flash technology, emphasizing the development of its key characteristics and elucidating the factors that made it not only the most significant integrated solution for high-volume nonvolatile storage but also a potent competitor that is steadily eating away at the market share of hard disk drives. We will pay particular attention to the scaling pattern that planar arrays follow and the main physical limitations that affect the dependability and performance of contemporary deca-nanometer technology. This will clarify why focusing all efforts on the integration of 3-D arrays can be deemed more advantageous than developing further planar nodes with feature sizes below ~15 nm, which represents the current state of the art. After that, the most potential 3-D architectures will be examined, with a focus on the advantages and disadvantages of each as well as the implications of the shifting integration paradigm for the main NAND applications.
Keywords: NAND Flash, Error correction, Programming, Storage, Erasing, 3-D Array, Memory, CPU, Control Logic
[This article belongs to Journal of VLSI Design Tools and Technology(jovdtt)]
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Journal of VLSI Design Tools and Technology
| Volume | 14 |
| Issue | 02 |
| Received | June 10, 2024 |
| Accepted | July 8, 2024 |
| Published | August 7, 2024 |